A developer of CMOS-based transistor and enabling circuit technologies, SuVolta is making possible straightforward performance- power optimization in existing IC's and even greater improvements in new and more aggressive designs. The Deeply Depleted Channel™ (DDC) technology is proven and in production as of mid-2013. SuVolta currently has six technology development programs with top-tier semiconductor companies, from 65nm to 20nm process nodes. Announced programs are at 28nm and 65nm process nodes.
SuVolta has developed a Deeply Depleted Channel (DDC) technology that provides significant power and performance benefits to integrated circuits and that is fabricated in conventional CMOS. DDC transistor technology enables scaling of two of the most critical transistor parameters – supply voltage, and transistor size to 20nm and below. DDC technology enables the reduction of both leakage power and active power consumption, primarily by addressing transistor threshold voltage (VT) variation and carrier mobility issues. Since SuVolta’s technology uses planar, bulk CMOS, it is compatible with existing manufacturing infrastructure, can be easily integrated into existing processes and is compatible with existing IP and design tools.
SuVolta has a premier team of world-class engineers and scientists with a long history of technology development and innovation to advance the semiconductor industry.
SuVolta is backed by a leading group of investors with a long track record of building significant companies.
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