The industry is talking about SuVolta’s innovative low-power platform. See some of the quotes below.
“ARM’s heritage is based on low power, so technologies that can further improve power consumption, such as DDC technology from SuVolta, will always be welcomed by ARM and our Partner. SuVolta has shown that the DDC technology, when incorporated into an ARM processor, can provide additional power reductions or a significant performance boost. As the Internet of Things continues to expand, innovative ultra-low power technology for sensors and other devices will be vital to ensure that ARM remains at the forefront of this opportunity.”
Noel Hurley, Vice President, Strategy and Marketing, Processor Division, ARM
“In the next weeks and months, we expect to see promising results from joint technology development with SuVolta to further validate the power and performance benefits of the DDC technology in UMC’s 28nm HKMG process. By incorporating SuVolta’s advanced technology into our HKMG process, we intend to deliver a 28nm mobile computing process platform to complement our existing Poly-SiON and HKMG technologies.”
T. R. Yew, Vice President of Advanced Technology Division, UMC
“SuVolta’s low-power platform could have a dramatic impact on the industry. The substantial device matching improvement of core and IO devices, enhanced body effect and perceived ‘simple’ integration with a digital CMOS manufacturing flow are momentous and could have a dramatic impact on reducing power and cost of highly-integrated SoCs.”
Pieter Vorenkamp, Senior Vice President, Operations Engineering, Operations and Central Engineering, Broadcom Corporation
“In a world where mobile applications increasingly dominate, power and cost are the primarily limiters of scaling semiconductor process technologies. SuVolta has developed an innovative way to significantly reduce CMOS transistor active and leakage power. By tightening threshold voltage variability while maintaining performance at lower supply voltage, SuVolta’s platform extends the useful life of bulk planar CMOS processes and the products they enable and negates the need for costly, complex technologies like EUV lithography, FD-SOI or FinFETs. Furthermore, the technology enables companies to preserve and extend the legacy IP blocks they have spent years developing.”
T.J. Rodgers, Founder, President and Chief Executive Officer and Director, Cypress Semiconductor
"Fujitsu Semiconductor continues to advance the development of high-speed and energy efficient consumer and mobile products. The latest example is MB86S22AA Milbeaut image processor which was made possible by SuVolta's innovative technology and Fujitsu Semiconductor's accumulation of expertise in putting process technology into volume production. By collaborating with SuVolta to bring up ultra-low-power DDC-transistor 65nm and 55nm processes, Fujitsu Semiconductor is not only enabling advancements in our ASIC products, but also will enhance the designs of COT customers."
Amane Inoue, Corporate Senior Vice President, Fujitsu Semiconductor Limited
"What SuVolta has developed is really amazing. Outside of Intel, AMD and IBM, there hasn’t been any kind of device research group until now -- and those three companies are focused on high-performance for tethered microprocessors. The interesting thing about SuVolta is the low-power focus for mobile applications. The industry is shifting to mobility, and SuVolta’s technology will make mobility real for a lot more companies. This stuff is really important. You are talking about saving companies billions of dollars. I expect SuVolta will change the industry.”
G. Dan Hutcheson, CEO, VLSI Research & Sr. Analyst, weSRCH.com
"There continues to be strong demand for semiconductors that have lower cost and lower power consumption at all technology nodes. Smart phones and tablet computers are the key drivers and are high volume platforms.
While there are multiple options for addressing the cost and power challenges, the technology of SuVolta is an innovative approach that can be used by many semiconductor companies globally. One key advantage of SuVolta is the ability to use the process flows that already exist within the high volume wafer manufacturing facilities, which can increase the lifetime of capital-intensive wafer fabrication facilities."
Handel Jones, President and CEO, International Business Strategies, Inc.
“The introduction of smaller process geometries at 20/22nm and 14/16nm on the near horizon will provide SoC designers with very large transistor budgets to use in meeting their functionality targets. As the complexity levels in these parts increase, so will the resources on chip increase to manage the higher power consumption inherent in aggregating large numbers of transistors together. Adding ever more silicon resources to deal with higher power consumption is a self-defeating proposition in the long run. A much better way is to make the transistors used in the design more efficient in handling leakage currents and in how much power they consume while operating. The SuVolta technology does both in dramatic fashion by reducing both active and standby power while increasing performance using contemporary planar CMOS transistors and bulk CMOS processes.”
Rich Wawrzyniak, Sr. Market Analyst, Semico Research Corp.
“As process technologies scale, the power, performance and cost benefits are not keeping pace, resulting in dramatic increasing in design costs as process geometries scale. By providing a mid-life kicker, the DDC technology can enable companies to get the benefits of scaling to a smaller node without incurring the significant and increasing design costs associated with the shrink, or migrating to new process technologies like 3D or FDSOI. This could have a dramatic impact on the industry as SuVolta proves this out in 28nm and 20nm as they have in 65nm/55nm complex SoC.”
Len Jelinek, Sr. Director & Chief Analyst, IHS Electronics & Media
“Designers traditionally reduce the power their chips consume by shrinking the dimensions of transistors in their chips, but the expense incurred in moving to smaller geometries escalates with each technology node. SuVolta’s novel transistor design reduces power by a factor of two without shrinking the size of the transistor. This enables a mature 65nm process to deliver performance per watt characteristics comparable to advanced 32nm processes. SuVolta’s innovation should appeal especially to semiconductor suppliers who want to reduce the power their chips consume, or to increase performance within a fixed power budget, but don’t need the higher transistor density a smaller process geometry enables. While some argue that the industry must move to 3-D transistor structures now, SuVolta shows that rumors of the death of the planar transistor have been greatly exaggerated.”
Nathan Brookwood, Research Fellow, Insight 64
"SuVolta's results with an ARM Cortex-M0 test chip look very promising. SuVolta is reporting significant improvements after modifying a proven 65nm bulk-CMOS process. Silicon customers can use those improvements to reduce power consumption, increase performance, or achieve their ideal balance of those parameters. SuVolta's technology can extend the life of planar CMOS processes."
Tom R. Halfhill, Senior Analyst, The Linley Group’s Microprocessor Report