“In a world where mobile applications increasingly dominate, power and cost are the primarily limiters of scaling semiconductor process technologies. SuVolta has developed an innovative way to significantly reduce CMOS transistor active and leakage power. By tightening threshold voltage variability while maintaining performance at lower supply voltage, SuVolta’s platform extends the useful life of bulk planar CMOS processes and the products they enable and negates the need for costly, complex technologies like EUV lithography, FD-SOI or FinFETs. Furthermore, the technology enables companies to preserve and extend the legacy IP blocks they have spent years developing.”
T.J. Rodgers, Founder, President and Chief Executive Officer and Director, Cypress Semiconductor
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“As the leader in low-power microprocessor architecture, ARM continues to monitor new technologies that may yield significant power or cost reduction in advanced SoC designs. The aim is to avoid excessive upgrade costs in new fabrication facilities or circuit design. SuVolta’s innovative PowerShrink platform offers a promising approach to extending the scaling of CMOS transistor technology. The results could significantly lower power consumption in future high performance, low-power chips.”
Krisztian Flautner, Vice President Research & Development, ARM
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“SuVolta’s low-power platform could have a dramatic impact on the industry. The substantial device matching improvement of core and IO devices, enhanced body effect and perceived ‘simple’ integration with a digital CMOS manufacturing flow are momentous and could have a dramatic impact on reducing power and cost of highly-integrated SoCs.”
Pieter Vorenkamp, Senior Vice President, Operations Engineering, Operations and Central Engineering, Broadcom Corporation
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“Fujitsu Semiconductor continues to advance the development of high-speed and energy efficient products. Working closely with SuVolta on the joint technology development, Fujitsu Semiconductor has produced favorable results for reducing power consumption. By combining the SuVolta technology with our mature low-power process technology, Fujitsu Semiconductor will be able to aggressively respond to customers’ requests for low-power consumption in consumer products and mobile devices.”
Dr. Haruyoshi Yagi, Corporate Senior Executive Vice President, Fujitsu Semiconductor Limited
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“In a world where mobile applications increasingly dominate, power and cost are the primarily limiters of scaling semiconductor process technologies. SuVolta has developed an innovative way to significantly reduce CMOS transistor active and leakage power. By tightening threshold voltage variability while maintaining performance at lower supply voltage, SuVolta’s platform extends the useful life of bulk planar CMOS processes and the products they enable and negates the need for costly, complex technologies like EUV lithography, FD-SOI or FinFETs. Furthermore, the technology enables companies to preserve and extend the legacy IP blocks they have spent years developing.”
T.J. Rodgers, Founder, President and Chief Executive Officer and Director, Cypress Semiconductor
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"What SuVolta has developed is really amazing. Outside of Intel, AMD and IBM, there hasn't been any kind of device research group until now -- and those three companies are focused on high-performance for tethered microprocessors. The interesting thing about SuVolta is the low-power focus for mobile applications. The industry is shifting to mobility, and SuVolta's technology will make mobility real for a lot more companies. This stuff is really important. You are talking about saving companies billions of dollars. I expect SuVolta will change the industry."
G. Dan Hutcheson, CEO, VLSI Research & Sr. Analyst, weSRCH.com
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“IC market growth is being driven primarily by mobile, multimedia platforms. Continued miniaturization and integration of advanced functions, however, is limited by the IC’s power consumption. SuVolta has defined a way to break the power impasse with its innovative low power technology that has been demonstrated to significantly reduce power consumption. The PowerShrink platfom extends the value of 65nm process technology and similarly has strong potential for 28nm and beyond. This breakthrough is particularly important as the cost of scaling to smaller process technologies becomes more and more prohibitive.”
Handel Jones, President and CEO, International Business Strategies, Inc.
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“The rise in connectivity and functionality seen in the SoCs targeted at mobile applications has driven complexity levels beyond the point where contemporary power management techniques to reduce power consumption can continue to provide adequate solutions to the marketplace. To continue to push the functionality envelope, another approach is needed. The SuVolta technology to reduce both active and standby power, while at the same time keeping performance at current or even enhanced levels, is truly a breath of fresh air to the semiconductor market. This innovative approach addresses the leaky transistor issue and provides real-time adaptive voltage scaling, while using contemporary planar CMOS transistors and bulk CMOS processes. This is a technology the industry has been clamoring for and now SuVolta offers the promise of realizing real power savings while meeting the functionality requirements of the market without a decrease in performance. Bravo SuVolta!”
Rich Wawrzyniak, Sr. Market Analyst, Semico Research Corp.
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“Designers traditionally reduce the power their chips consume by shrinking the dimensions of transistors in their chips, but the expense incurred in moving to smaller geometries escalates with each technology node. SuVolta’s novel transistor design reduces power by a factor of two without shrinking the size of the transistor. This enables a mature 65nm process to deliver performance per watt characteristics comparable to advanced 32nm processes. SuVolta’s innovation should appeal especially to semiconductor suppliers who want to reduce the power their chips consume, or to increase performance within a fixed power budget, but don’t need the higher transistor density a smaller process geometry enables. While some argue that the industry must move to 3-D transistor structures now, SuVolta shows that rumors of the death of the planar transistor have been greatly exaggerated.”
Nathan Brookwood, Research Fellow, Insight64
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“The semiconductor industry is pursuing power efficiency as doggedly as some early explorers searched for the fountain of youth. But today's goal -- longer battery life -- isn't an unattainable fable. Any technology that promises to greatly improve the power efficiency of microprocessors without sacrificing performance is worth a close look.”
Tom R. Halfhill, Senior Analyst, The Linley Group’s Microprocessor Report
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